Heterogeneous Multi-core Architectures: Optimizing Power and Performance
نویسندگان
چکیده
In order to satisfy the high-performance and lowpower requirements for advanced embedded systems with greater flexibility, it is necessary to develop chip multiprocessors. However, homogeneous multi-core systems do not achieve higher potential per watt when compared to heterogeneous architectures as serialized code sections can be accelerated without programmer effort. Therefore, this project aims to evaluate single ISA heterogeneous multi-core architectures as a way to reduce processor power dissipation by switching cores to achieve target performance level. The project involves testing different sizes and configuration of cores on a single chip which achieves maximum power reduction. gem5 full-system simulator or Sniper Multi-core simulator will be used for performance modelling and McPAT will help for power modelling.
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تاریخ انتشار 2014